1. Field of the Invention
The invention generally relates to multi-core microprocessors, multiprocessor systems and corresponding methods, and in particular to the validation of atomic transactions in multiprocessor environments.
2. Description of the Related Art
Multiprocessor systems are computing environments that use two or more central processing units (CPUs) within a single platform. Multiprocessing also refers to the ability of a computing system to support more than one processor and to allocate tasks between them. In general, multiprocessing systems may be built using multiple cores on one die, multiple chips in one package, multiple packages in one system unit, or the like.
Such multiprocessor systems may become quite complex and therefore require powerful tools to validate the correctness and robustness of the overall operation. Such validation is helpful both in the design phase as well as at a later stage in simulation or real operation processes.
For instance, the determination of race conditions in atomic operations might have a significant influence on the multiprocessor system validation. Race conditions, or race hazards, are flaws in a system or process which lead to an output of the process which is unexpected and critically depends on the sequence or timing of other events. Atomic operations are operations that can be combined so that they appear, to the rest of the system, to be a single operation with only two possible outcomes: success or failure. Atomic operations can be classified as modifying operations and non-modifying operations, where modifying operations are used to modify the contents of a memory location while non-modifying operations do not have this functionality. An example of an atomic modifying operation is an atomic read-modify-write (Atomic Read Modify Write) instruction which atomically reads a memory location into a register and, conditionally or absolutely, writes a new value back to the location.
Implementing atomic read-modify-write instructions in multiprocessor environments is a difficult task, because atomic read-modify-write operations (as well as other modifying and non-modifying atomic operations) require that no other operation updates the coherency granule during operation. Coherency granules are units of data that are stored in memory, and these units generally have a close relationship to caches that may be used in the system. Coherency granules are units of storage that may, e.g., be cache lines or sectors written to and read from in a manner ensuring that data is consistent between the system memory and the cache.
It is therefore found that atomic operations, and in particular atomic read-modify-write instructions, are difficult to validate and require an extensive and wide variety of stimuli. In the silicon design phase, such operations may lead to errors which are often masked by other operations and thus may not manifest as a program error. Such errors are therefore extremely difficult to debug on a multiprocessor system, in particular on a multi-core or even multi-node system.